MAJC (Microprocessor Architecture for Java Computing, pronounced as "magic") CPU is VLIW descendant (detail description of VLIW CPUs can be found on this page) with the following peculiarities:

Data type neutral functional units

Other CPUs have certain number of integer and floating point units. So, during heavy floating point calculations integer units does nothing. MAJC contains up to 4 functional units which can handle any type of data thus utilizing maximum number of functional units without increasing their count.

SIMD (Single Instruction Multiple Data)

Each functional unit capable to run instructions which process multiple chunks of data (like DSP or Velocity Engine of PowerPC G4).

Vertical Multithreading

Vertical multithreading allows CPU to switch to another instruction stream in case of cache miss (cash miss could cause up to 100 idle CPU cycles). MAJC can maintain up to 4 references to instruction streams for fast switching.

Saturation Arithmetic

Saturation Arithmetic needed to handle positive and negative overflow. MAJC supports saturation arithmetic for 8, 16, 32, 64-bit data. Small example: without saturation arithmetic support increasing intensity of white pixel turns it black.

CPU Clustering

MAJC designed to support effective multiprocessing. Multiple MAJC CPUs can reside on single die.

Continued - Elbrus E2K...

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